Datasheet

Datasheet, Volume 2 75
Processor Integrated I/O (IIO) Configuration Registers
3.3.4.30 LNKCON2—PCI Express* Link Control Register 2
Register: LNKCON2
Device: 0 (DMI), 3, 5 (PCIe)
Function: 0
Offset: C0h
Bit Attr Default Description
15:13 RO 0 Reserved
12 RWS 0
Compliance De-Emphasis
This bit sets the de-emphasis level in Polling Compliance state if the entry
occurred due to the Enter Compliance bit being 1b.
1b = 3.5 dB
0b = 6 dB
11 RWS 0
Compliance SOS
When set to 1, the LTSSM is required to send SKP Ordered Sets periodically in
between the (modified) compliance patterns.
10 RWS 0
Enter Modified Compliance
When this bit is set to 1, the device transmits Modified Compliance Pattern if
the LTSSM enters Polling.Compliance substate.
9:7 RWS 0
Transmit Margin
This field controls the value of the non de-emphasized voltage level at the
Transmitter pins.
6RWO 0
Selectable De-Emphasis
When the Link is operating at 5.0 GT/s speed, this bit selects the level of de-
emphasis for an Upstream component.
Encodings:
1b = 3.5 dB
0b = 6 dB
When the Link is operating at 2.5 GT/s speed, the setting of this bit has no
effect.
5RW 0
Hardware Autonomous Speed Disable
When set to 1, this bit disables hardware from changing the Link speed for
device specific reasons other than attempting to correct unreliable Link
operation by reducing Link speed.
4RWS 0
Enter Compliance
Software is permitted to force a link to enter Compliance mode at the speed
indicated in the Target Link Speed field by setting this bit to 1b in both
components on a link and then initiating a hot reset on the link.
3:0 RWS
Dev0: 0001b
Dev 3, 5:
0010b
Dev 3,5:
0010b
Target Link Speed
This field sets an upper limit on link operational speed by restricting the values
advertised by the upstream component in its training sequences.
Defined encodings are:
0001b = 2.5-Gb/s Target Link Speed
0010b = 5-Gb/s Target Link Speed
All other encodings are reserved.
If a value is written to this field that does not correspond to a speed included
in the Supported Link Speeds field, Integrated I/O will default to Gen1 speed.
This field is also used to set the target compliance mode speed when software
is using the Enter Compliance bit to force a link into compliance mode.