Datasheet

Intel® Xeon® Processor 3400 Series Datasheet, Volume 1 53
Signal Description
6.8 JTAG/ITP Signals
FDI_LSYNC[1]
Intel
®
Flexible Display Interface Line Sync - Pipe B.
Note: This signal is not used by the processor. It is
connected to V
SS
on the package.
FDI_TX[3:0]
FDI_TX#[3:0]
Intel
®
Flexible Display Interface Transmit Differential
Pair - Pipe A..
Note: These signals are not used by the processor.
They are connected to V
SS
on the package.
FDI_TX[7:4]
FDI_TX#[7:4]
Intel
®
Flexible Display Interface Transmit Differential
Pair - Pipe B.
Note: These signals are not used by the processor.
They are connected to V
SS
on the package.
Table 6-10. JTAG/ITP
Signal Name Description Direction Type
BPM#[7:0]
Breakpoint and Performance Monitor Signals: Outputs
from the processor that indicate the status of
breakpoints and programmable counters used for
monitoring processor performance.
I/O GTL
DBR#
DBR# is used only in systems where no debug port is
implemented on the system board. DBR# is used by a
debug port interposer so that an in-target probe can
drive system reset.
O
PRDY#
PRDY# is a processor output used by debug tools to
determine processor debug readiness.
O
Asynch
GTL
PREQ#
PREQ# is used by debug tools to request debug
operation of the processor.
I
Asynch
GTL
TCK
TCK (Test Clock) provides the clock input for the
processor Test Bus (also known as the Test Access Port).
ITAP
TDI
TDI (Test Data In) transfers serial test data into the
processor. TDI provides the serial input needed for JTAG
specification support.
ITAP
TDI_M
TDI_M (Test Data In) transfers serial test data into the
processor. TDI_M provides the serial input needed for
JTAG specification support.
ITAP
TDO
TDO (Test Data Out) transfers serial test data out of the
processor. TDO provides the serial output needed for
JTAG specification support.
OTAP
TDO_M
TDO_M (Test Data Out) transfers serial test data out of
the processor. TDO_M provides the serial output needed
for JTAG specification support.
OTAP
TMS
TMS (Test Mode Select) is a JTAG specification support
signal used by debug tools.
ITAP
TRST#
TRST# (Test Reset) resets the Test Access Port (TAP)
logic. TRST# must be driven low during power on Reset.
ITAP
Table 6-9. Intel
®
Flexible Display Interface (Sheet 2 of 2)
Signal Name Description Direction Type