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Errata
36 Specification Update
KBL039
Writing a Non-Canonical Value to an LBR MSR Does Not Signal a #GP When
Intel® PT is Enabled
Problem
If Intel PT (Intel Processor Trace) is enabled, WRMSR will not cause a general-
protection exception (#GP) on an attempt to write a non-canonical value to any of
the following MSRs:
• MSR_LASTBRANCH_{0 - 31}_FROM_IP (680H – 69FH)
• MSR_LASTBRANCH__{0 - 31}_TO_IP (6C0H – 6DFH)
• MSR_LASTBRANCH_FROM_IP (1DBH)
• MSR_LASTBRANCH_TO_IP (1DCH)
• MSR_LASTINT_FROM_IP (1DDH)
• MSR_LASTINT_TO_IP (1DEH)Instead the same behavior will occur as if a canonical
value had been written. Specifically, the WRMSR will be dropped and the MSR value
will not be changed.
Implication Due to this erratum, an expected #GP may not be signaled.
Workaround None identified.
Status For the steppings affected, see the Summary Table of Changes.
KBL040 Processor May Run Intel® AVX Code Much Slower Than Expected
Problem After a C6 state exit, the execution rate of AVX instructions may be reduced.
Implication Applications using AVX instructions may run slower than expected.
Workaround It is possible for the BIOS to contain a workaround
Status For the steppings affected, see the Summary Table of Changes.
KBL041 Intel® PT Buffer Overflow May Result in Incorrect Packets
Problem
Under complex micro-architectural conditions, an Intel PT (Processor Trace) OVF
(Overflow) packet may be issued after the first byte of a multi-byte CYC (Cycle
Count) packet, instead of any remaining bytes of the CYC.
Implication
When this erratum occurs, the splicing of the CYC and OVF packets may prevent the
Intel PT decoder from recognizing the overflow. The Intel PT decoder may then
encounter subsequent packets that are not consistent with expected behavior.
Workaround
None Identified. The decoder may be able to recognize that this erratum has
occurred when a two-byte CYC packet is followed by a single byte CYC, where the
latter 2 bytes are 0xf302, and where the CYC packets are followed by a FUP (Flow
Update Packet) and a PSB+ (Packet Stream Boundary+). It should then treat the
two CYC packets as indicating an overflow.
Status For the steppings affected, see the Summary Table of Changes.