Other Content
Errata
Specification Update 51
KBL093 The Intel PT CR3 Filter is Not Re-evaluated on VM Entry
Problem
On a VMRESUME or VMLAUNCH with both TraceEn[0] and CR3Filter[7] in
IA32_RTIT_CTL (MSR 0570H) set to 1 both before the VM Entry and after, the new
value of CR3 is not compared with IA32_RTIT_CR3_MATCH (MSR 0572H).
Implication
The Intel PT (Processor Trace) CR3 filtering mechanism may continue to generate
packets despite a mismatching CR3 value, or may fail to generate packets despite a
matching CR3, as a result of an incorrect value of IA32_RTIT_STATUS.ContextEn[1]
(MSR 0571H) that results from the failure to re-evaluate the CR3 match on VM entry.
Workaround None identified.
Status For the steppings affected, see the Summary Table of Changes.
KBL094
Display Slowness May be Observed Under Certain Display Commands
Scenario
Problem
Back to back access to the VGA register ports (I/O addresses 0x3C2, 0x3CE, 0x3CF)
will experience higher than expected latency.
Implication Due to this erratum, the processor may redraw the slowly when in VGA mode.
Workaround None identified.
Status For the steppings affected, see the Summary Table of Changes.
KBL095
Short Loops Which Use AH/BH/CH/DH Registers May Cause Unpredictable
System Behavior
Problem
Under complex micro-architectural conditions, short loops of less than 64 instructions
that use AH, BH, CH or DH registers as well as their corresponding wider register
(e.g. RAX, EAX or AX for AH) may cause unpredictable system behavior. This can
only happen when both logical processors on the same physical processor are active.
Implication Due to this erratum, the system may experience unpredictable system behavior.
Workaround It is possible for the BIOS to contain a workaround for this erratum
Status For the steppings affected, see the Summary Table of Changes.
KBL096 CPUID TLB Associativity Information is Inaccurate
Problem
CPUID leaf 2 (EAX=02H) TLB information inaccurately reports that the shared 2nd-
Level TLB is 6-way set associative (value C3H), although it is 12-way set associative.
Other information reported by CPUID leaf 2 is accurate.
Implication
Software that uses CPUID shared 2nd-level TLB associativity information for value
C3H may operate incorrectly. Intel has not observed this erratum to impact the
operation of any commercially available software
Workaround
None identified. Software should ignore the shared 2nd-Level TLB associativity
information reported by CPUID for the affected processors.
Status For the steppings affected, see the Summary Table of Changes.










