Specification Sheet
MCHBAR Registers
168 Datasheet, Volume 2 of 2
7 MCHBAR Registers
Table 7-1. Summary of Bus: 0, Device: 0, Function: 0 (MEM)
Offset
Size
(Bytes)
Register Name (Register Symbol) Default Value
4000h 4 MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR—Offset 4000h 0h
401Ch 4 MCHBAR_CH0_CR_SC_GS_CFG_0_0_0_MCHBAR—Offset 401Ch 0h
4070h 4 MCHBAR_CH0_CR_TC_ODT_0_0_0_MCHBAR—Offset 4070h 0h
4238–423Bh 4 Refresh parameters (TC)—Offset 4238h 4600980Fh
423C–423Fh 4 Refresh timing parameters (TC)—Offset 423Ch B41004h
4260–4263h 4 Power Management DIMM Idle Energy (PM)—Offset 4260h 0h
4264–4267h 4 Power Management DIMM Power Down Energy (PM)—Offset 4264h 0h
4268–426Bh 4 Power Management DIMM Activate Energy (PM)—Offset 4268h 0h
426C–426Fh 4 Power Management DIMM RdCas Energy (PM)—Offset 426Ch 0h
4270–4273h 4 Power Management DIMM WrCas Energy (PM)—Offset 4270h 0h
4400h 4 MCHBAR_CH1_CR_TC_PRE_0_0_0_MCHBAR—Offset 4400h 0h
441Ch 4 MCHBAR_CH0_CR_SC_GS_CFG_0_0_0_MCHBAR—Offset 441Ch 0h
4470h 4 MCHBAR_CH0_CR_TC_ODT_0_0_0_MCHBAR—Offset 4470h 0h
4638–463Bh 4 Refresh parameters (TC)—Offset 4638h 4600980Fh
463C–463Fh 4 Refresh timing parameters (TC)—Offset 463Ch B41004h
4660–4663h 4 Power Management DIMM Idle Energy (PM)—Offset 4660h 0h
4664–4667h 4 Power Management DIMM Power Down Energy (PM)—Offset 4664h 0h
4668–466Bh 4 Power Management DIMM Activate Energy (PM)—Offset 4668h 0h
466C–466Fh 4 Power Management DIMM RdCas Energy (PM)—Offset 466Ch 0h
4670–4673h 4 Power Management DIMM WrCas Energy (PM)—Offset 4670h 0h
4C1Ch 4 MCSCHEDS_CR_SC_GS_CFG_0_0_0_MCHBAR—Offset 4C1Ch 0h
4C40–4C43h 4 PM—Offset 4C40h 0h
4C70h 4 MCSCHEDS_CR_TC_ODT_0_0_0_MCHBAR—Offset 4C70h 0h
4E38–4E3Bh 4 Refresh parameters (TC)—Offset 4E38h 4600980Fh
4E3C–4E3Fh 4 Refresh timing parameters (TC)—Offset 4E3Ch B41004h
4E60–4E63h 4 Power Management DIMM Idle Energy (PM)—Offset 4E60h 0h
4E64–4E67h 4 Power Management DIMM Power Down Energy (PM)—Offset 4E64h 0h
4E68–4E6Bh 4 Power Management DIMM Activate Energy (PM)—Offset 4E68h 0h
4E6C–4E6Fh 4 Power Management DIMM RdCas Energy (PM)—Offset 4E6Ch 0h
4E70–4E73h 4 Power Management DIMM WrCas Energy (PM)—Offset 4E70h 0h
5000–5003h 4
Address decoder inter channel configuration register (MAD)—Offset
5000h
0h
5004–5007h 4
Address decoder intra channel configuration register (MAD)—Offset
5004h
0h
5008–500Bh 4
Address decoder intra channel configuration register (MAD)—Offset
5008h
0h
500C–500Fh 4 Address decode DIMM parameters. (MAD)—Offset 500Ch 0h










