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Mobile Intel
®
Pentium
®
III Processor in BGA2 and Micro-PGA2 Packages at 1 GHz,
900 MHz, 850 MHz, 800 MHz, 750 MHz, 700 MHz, Low-voltage 750 MHz, Low-voltage
700 MHz, Low-voltage 600 MHz, Ultra Low-voltage 600 MHz and Ultra Low-voltage 500 MHz
283653-002 Datasheet 37
Table 21. Stop Grant/Sleep/Deep Sleep AC Specifications
T
J
= 0°C to 100°C; T
J
= 5°C to 100°C for Vcc = 1.15V; V
CC
= 0.975V ±25 mV or 1.10V ±80 mV or 1.15V
±80 mV or 1.35V ±100 mV or 1.60V ±115 mV or 1.70V -80/+125 mV ; V
CCT
= 1.50V ±115 mV
Symbol Parameter Min Max Unit Figure
T50 SLP# Signal Hold Time from Stop Grant Cycle Completion 100 BCLKs Figure 15
T51 SLP# Assertion to Input Signals Stable 0 ns Figure 15
T52 SLP# Assertion to Clock Stop 10 BCLKs Figure 15
T54 SLP# Hold Time from PLL Lock 0 ns Figure 15
T55 STPCLK# Hold Time from SLP# Deassertion 10 BCLKs Figure 15
T56 Input Signal Hold Time from SLP# Deassertion 10 BCLKs Figure 15
NOTE: Input signals other than RESET# must be held constant in the Sleep state. The BCLK Settling Time
specification (T60) applies to Deep Sleep state exit under all conditions.
Table 22. Intel SpeedStep Technology AC Specifications
T
J
= 0°C to 100°C; T
J
= 5°C to 100°C for Vcc = 1.15V; V
CC
= 0.975V ±25 mV or 1.10V ±80 mV or 1.15V
±80 mV or 1.35V ±100 mV or 1.60V ±115 mV or 1.70V -80/+125 mV ; V
CCT
= 1.50V ±115 mV
Symbol Parameter Min Max Unit Figure Notes
T57 GHI# Setup Time from BCLK Restart 150 ns Figure 16 Note 1
T58 GHI# Hold Time from BCLK Restart 30
µs
Figure 16 Note 1
T59 GHI# Sample Delay 10
µs
Figure 16 Note 1
T60 BCLK Settling Time 150 ns Figure 16 Notes 2, 3
NOTES:
1. GHI# is ignored until 10 µs after BCLK stops, the setup and hold window must occur after this time.
2. BCLK must meet the BCLK AC specification from Table 13 within 150 ns of turning on (rising above
V
IL,BCLK
).
3. This specification applies to the exit from the Deep Sleep state whether or not a Intel SpeedStep
technology operating mode transition occurs.
Figure 6 through Figure 16 are to be used in conjunction with Table 13 through Table 22.