Specification Update

Summary Tables of Changes
14 Specification Update
Steppings
NO.
B-1 CPU
Signature
= 06D6h
C-0 CPU
Signature
= 06D8h
B-1 CPU
Signature
= 0695h
C-0 CPU
Signature
= 06E8h
D-0 CPU
Signature
= 06ECh
B-2 CPU
Signature
= 06F6h
A-1 CPU
Signature
= 10661h
Plans
ERRATA
W12 X No Fix
SysEnter and SysExit
Instructions May Write
Incorrect Requestor
Privilege Level (RPL) in
the FP Code Segment
Selector (FCS)
W13 X X X X X No Fix
Memory Aliasing with
Inconsistent A and D Bits
May Cause Processor
Deadlock
W14 X X X No Fix
RDMSR or WRMSR to
Invalid MSR Address May
Not Cause GP Fault
W15 X No Fix FP Tag Word Corruption
W16 X X X No Fix
Unable to Disable
Reads/Writes to
Performance Monitoring
Related MSRs
W17 X X X No Fix
Move to Control Register
Instruction May Generate
a Breakpoint Report
W18 X X X X X X X No Fix
REP MOVS/STOS
Executing with Fast
Strings Enabled and
Crossing Page Boundaries
with Inconsistent Memory
Types May Use an
Incorrect Data Size or
Lead to Memory-Ordering
Violations
W19 X No Fix
The FXSAVE, STOS, or
MOVS Instruction May
Cause a Store Ordering
Violation When Data
Crosses a Page with a UC
Memory Type
W20 X No Fix
Machine Check Exception
May Occur Due to
Improper Line Eviction in
the IFU
W21 Errata - Removed
W22 X No Fix
Performance Event
Counter Returns Incorrect
Value on L2_LINES_IN
Event