Specification Update

Errata
36 Specification Update
W7. Processor Can Enter a Livelock Condition under Certain
Conditions When FP Exception Is Pending
Problem: Processor clock modulation may be controlled via a processor register
(IA32_THERM_CONTROL) or via the STPCLK# signal. While the
processor clock is constantly being actively modulated at 12.5% and
25% duty cycles and there is a pending unmasked FP exception (ES
pending), if you attempt a FP load (or MMX™ technology Mov
instruction) and the load has an longer than typical latency the
processor can enter a livelock.
Implication: When this erratum occurs, the processor will enter a livelock condition.
Intel has not observed this erratum with any commercially-available
software or system.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.
W8. Write Cycle of Write Combining Memory Type Does Not
Self Snoop
Problem: Write cycles of WC memory type do not self-snoop. This may result in
data inconsistency- if the addresses of the WC data are aliased to WB
memory type memory, which has been cached. In such a case, the
internal caches will not be updated with the WC data sent on the
system bus.
Implication: This condition may result in a data inconsistency. Intel has not
observed this erratum with any commercially-available software,
system, nor components.
Workaround: Software should detect via the self-snoop bit in the CPUID features flags if the
processor supports a self-snooping capability. Software should perform explicit
memory management/flushing for aliased memory ranges on processor that do not
self-snoop.
Status: For the steppings affected, see the Summary Tables of Changes.
W9. Performance Monitoring Event That Counts Floating Point
Computational Exceptions (11h) Is Not Accurate
Problem: Performance monitoring event that counts Floating Point Compare
exceptions may have inaccurate results.
Implication: There is no functional impact of this erratum. However this
Performance Monitoring Event should not be used when accurate
performance monitoring is required.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.