Specification Update

Errata
Specification Update 39
W13. Memory Aliasing with Inconsistent A and D Bits May
Cause Processor Deadlock
Problem: In the event that software implements memory aliasing by having two-
page directory entries (PDEs) point to a common page table entry (PTE)
and the Accessed and Dirty bits for the two PDEs are allowed to
become inconsistent, the processor may become deadlocked.
Implication: This erratum has not been observed with commercially-available
software.
Workaround: Software that needs to implement memory aliasing in this way should manage the
consistency of the Accessed and Dirty bits.
Status: For the steppings affected, see the Summary Tables of Changes.
W14. RDMSR or WRMSR to Invalid MSR Address May Not Cause
GP Fault
Problem: The RDMSR and WRMSR instructions allow reading or writing of MSR’s
(Model Specific Registers) based on the index number placed in ECX.
The processor should reject access to any reserved or unimplemented
MSRs by generating #GP(0). However, there are some invalid MSR
addressers for which the processor will not generate #GP(0). This
erratum has not been observed with commercially-available software.
Implication: For RDMSR, undefined values will be read into EDX:EAX. For WRMSR,
undefined processor behavior may result.
Workaround: Do not use invalid MSR addresses with RDMSR or WRMSR.
Status: For the steppings affected, see the Summary Tables of Changes.
W15. FP Tag Word Corruption
Problem: In some rare cases, fault information generated as the result of
instruction execution may be incorrect. The result is an incorrect FP
stack entry.
Implication: This erratum may result in corruption of the FP tag word in a way that
a non-valid entry in the FP stack may become valid. The software is not
expected to read a non-valid entry. If the software attempts to use the
stack entry (which is expected to be empty) the result may be an
erroneous “Stack overflow.”
Workaround: Do not disable SSE/SSE2 in control register CR4 and avoid code segment limit
violation.
Status: For the steppings affected, see the Summary Tables of Changes.