Specification Update

Errata
Specification Update 41
W18. REP MOVS/STOS Executing with Fast Strings Enabled and
Crossing Page Boundaries with Inconsistent Memory
Types May Use an Incorrect Data Size or Lead to Memory-
Ordering Violations
Problem: Under certain conditions as described in the Intel® 64 and IA-32
Architecture Software Developer’s Manual section, Out-of-Order Stores
For String Operations in Pentium 4, Intel Xeon, and P6 Family
Processors, the processor performs REP MOVS or REP STOS as fast
strings. Due to this erratum fast string REP MOVS/REP STOS
instructions that cross page boundaries from WB/WC memory types to
UC/WP/WT memory types, may start using an incorrect data size or
may observe memory ordering violations.
Implication: Upon crossing the page boundary the following may occur, dependent
on the new page memory type:
• UC the data size of each write will now always be 8 bytes, as opposed to the
original data size.
• WP the data size of each write will now always be 8 bytes, as opposed to the
original data size and there may be a memory ordering violation.
• WT there may be a memory ordering violation.
Workaround: Software should avoid crossing page boundaries from WB or WC memory type to UC,
WP or WT memory type within a single REP MOVS or REP STOS instruction that will
execute with fast strings enabled.
Status: For the steppings affected, see the Summary Tables of Changes.
W19. The FXSAVE, STOS, or MOVS Instruction May Cause a
Store Ordering Violation When Data Crosses a Page with a
UC Memory Type
Problem: If the data from an FXSAVE, STOS, or MOVS instruction crosses a page
boundary from WB to UC memory type and this instruction is
immediately followed by a second instruction that also issues a store to
memory, the final data stores from both instructions may occur in the
wrong order.
Implication: The impact of this store ordering behavior may vary from normal
software execution to potential software failure. Intel has not observed
this erratum in commercially-available software.
Workaround: FXSAVE, STOS, or MOVS data must not cross page boundary from WB to UC memory
type.
Status: For the steppings affected, see the Summary Tables of Changes.