Specification Update

Errata
42 Specification Update
W20. Machine Check Exception May Occur Due to Improper Line
Eviction in the IFU
Problem: The processor is designed to signal an unrecoverable machine check
exception (MCE) as a consistency checking mechanism. Under a
complex set of circumstances involving multiple speculative branches
and memory accesses there exists a one cycle long window in which
the processor may signal a MCE in the instruction fetch unit (IFU)
because instructions previously decoded have been evicted from the
IFU. The one cycle long window is opened when an opportunistic fetch
receives a partial hit on a previously executed but not as yet completed
store resident in the store buffer. The resulting partial hit erroneously
causes the eviction of a line from the IFU at a time when the processor
is expecting the line to still be present. If the MCE for this particular IFU
event is disabled, execution will continue normally.
Implication: While this erratum may occur on a system with any number of
processors, the probability of occurrence increases with the number of
processors. If this erratum does occur, a machine check exception will
result. Note systems that implement an operating system that does not
enable the Machine Check Architecture will be completely unaffected by
this erratum (e.g., Microsoft Windows* 95 and Windows*98).
Workaround: It is possible for BIOS code to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Tables of Changes.