Specification Update

Errata
Specification Update 47
W34. FPU Operand Pointer May Not Be Cleared following
FINIT/FNINIT
Problem: Initializing the floating point state with either FINIT or FNINT, may not
clear the x87 FPU Operand (Data) Pointer Offset and the x87 FPU
Operand (Data) Pointer Selector (both fields form the FPUDataPointer).
Saving the floating point environment with FSTENV, FNSTENV, or
floating point state with FSAVE, FNSAVE or FXSAVE before an
intervening FP instruction may save uninitialized values for the
FPUDataPointer.
Implication: When this erratum occurs, the values for FPUDataPointer in the saved
floating point image structure may appear to be random values.
Executing any non-control FP instruction with memory operand will
initialize the FPUDataPointer. Intel has not observed this erratum with
any commercially-available software.
Workaround: After initialization, do not expect a floating point state saved memory image to be
correct, until at least one non-control FP instruction with a memory operand has been
executed.
Status: For the steppings affected, see the Summary Tables of Changes.
W35. FSTP (Floating Point Store) Instruction Under Certain
Conditions May Result in Erroneously Setting a Valid Bit
on an FP (Floating Point) Stack Register
Problem: When an FSTP instruction with a PDE/PTE (Page Directory Entry/Page
Table Entry) A/D bit update is followed by a user mode access fault due
to a code fetch to a page that has supervisor only access permission,
this may result in erroneously setting a valid bit of an FP stack register.
The FP top of stack pointer is unchanged.
Implication: This erratum may cause an unexpected stack overflow.
Workaround: User mode code should not depend on being able to recover from illegal accesses to
memory regions protected with supervisor only access when using FP instructions.
Status: For the steppings affected, see the Summary Tables of Changes.
W36. An Execute Disable Bit Violation May Occur on a Data
Page-Fault
Problem: Under a combination of internal events, unexpected Execute Disable
violations may occur on data accesses that are Execute Disable
protected.
Implication: This erratum may cause unexpected Execute Disable violations.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Tables of Changes.