Specification Update

Summary Tables of Changes
Specification Update 17
Stepping Stepping Stepping
Number
E-1 M-0 G-0
Plans ERRATA
AH82 Fixed Debug Register May Contain Incorrect Information on a MOVSS or
POPSS Instruction followed by SYSRET
AH83 X X X No Fix Single Step Interrupts with Floating Point Exception Pending May
Be Mishandled
AH84 X X X No Fix Non-Temporal Data Store May Be Observed in Wrong Program
Order
AH85 X X X No Fix Fault on ENTER Instruction May Result in Unexpected Values on
Stack Frame
AH86 X X Fixed CPUID Reports Architectural Performance Monitoring Version 2 Is
Supported, When Only Version 1 Capabilities are Available
AH87 X X X No Fix Unaligned Accesses to Paging Structures May Cause the Processor
to Hang
AH88 X X X No Fix Microcode Updates Performed during VMX Non-root Operation
Could Result in Unexpected Behavior
AH89 X X X No Fix INVLPG Operation for Large (2M/4M) Pages May Be Incomplete
under Certain Conditions
AH90 X X X No Fix Page Access Bit May Be Set Prior to Signaling a Code Segment
Limit Fault
AH91 X
X
Fixed
Update of Attribute Bits on Page Directories without Immediate TLB
Shootdown May Cause Unexpected Processor Behavior
AH92
Fixed Invalid Instructions May Lead to Unexpected Behavior
AH93 X X
X
No Fix
EFLAGS, CR0, CR4 and the EXF4 Signal May Be Incorrect after
Shutdown
AH94
Fixed
Performance Monitoring Counter MACRO_INSTS.DECODED May Not
Count Some Decoded Instructions
AH95 X X
Fixed
The Stack May be Incorrect as a Result of VIP/VIF Check on
SYSEXIT and SYSRET
AH96 X X
X
No Fix
Performance Monitoring Event SIMD_UOP_TYPE_EXEC.MUL Is
Counted Incorrectly for PMULUDQ Instruction
AH97 X X
X
No Fix
Storage of PEBS Record Delayed Following Execution of MOV SS or
STI
AH98 X X X No Fix Updating Code Page Directory Attributes without TLB Invalidation
May Result in Improper Handling of Code #PF
AH99 X X Fixed Performance Monitoring Event CPU_CLK_UNHALTED.REF May Not
Count Clock Cycles According to the Processors Operating
Frequency
AH100 X X X Plan Fix Store Ordering May Be Incorrect between WC and WP Memory
Types
AH101 Fixed (E)CX May Get Incorrectly Updated When Performing Fast String
REP STOS with Large Data Structures