Specification Update

Summary Tables of Changes
16 Specification Update
Steppings
Number
C-0 M-0 E-0
Status ERRATA
AZ21 X X X No Fix Premature Execution of a Load Operation Prior to Exception Handler
Invocation
AZ22 X X X No Fix Performance Monitoring Events for Retired Instructions (C0H) May
Not Be Accurate
AZ23 X X X No Fix Returning to Real Mode from SMM with EFLAGS.VM Set May Result
in Unpredictable System Behavior
AZ24 X X X No Fix CMPSB, LODSB, or SCASB in 64-bit Mode with Count Greater or
Equal to 248 May Terminate Early
AZ25 X X X No Fix Writing the Local Vector Table (LVT) when an Interrupt is Pending
May Cause an Unexpected Interrupt
AZ26 X X X No Fix Pending x87 FPU Exceptions (#MF) Following STI May Be Serviced
Before Higher Priority Interrupts
AZ27 X X X No Fix VERW/VERR/LSL/LAR Instructions May Unexpectedly Update the
Last Exception Record (LER) MSR
AZ28 X X X No Fix INIT Does Not Clear Global Entries in the TLB
AZ29 X X X No Fix Split Locked Stores May not Trigger the Monitoring Hardware
AZ30 X X X No Fix Programming the Digital Thermal Sensor (DTS) Threshold May
Cause Unexpected Thermal Interrupts
AZ31 X X X No Fix Writing Shared Unaligned Data that Crosses a Cache Line without
Proper Semaphores or Barriers May Expose a Memory Ordering
Issue
AZ32 X X X No Fix General Protection (#GP) Fault May Not Be Signaled on Data
Segment Limit Violation above 4-G Limit
AZ33 X X X No Fix An Asynchronous MCE During a Far Transfer May Corrupt ESP
AZ34 X X X Plan Fix CPUID Reports Architectural Performance Monitoring Version 2 is
Supported, When Only Version 1 Capabilities are Available
AZ35 X X X No Fix B0-B3 Bits in DR6 May Not be Properly Cleared After Code
Breakpoint
AZ36 X X X No Fix An xTPR Update Transaction Cycle, if Enabled, May be Issued to the
FSB after the Processor has Issued a Stop-Grant Special Cycle
AZ37 X X X Plan Fix Performance Monitoring Event IA32_FIXED_CTR2 May Not Function
Properly when Max Ratio is a Non-Integer Core-to-Bus Ratio
AZ38 X X X No Fix Instruction Fetch May Cause a Livelock During Snoops of the L1
Data Cache
AZ39 X X X No Fix Use of Memory Aliasing with Inconsistent Memory Type may Cause
a System Hang or a Machine Check Exception
AZ40 X X X No Fix A WB Store Following a REP STOS/MOVS or FXSAVE May Lead to
Memory-Ordering Violations
AZ41 X X X Plan Fix VM Exit with Exit Reason "TPR Below Threshold" Can Cause the
Blocking by MOV/POP SS and Blocking by STI Bits to be Cleared in
the Guest Interruptibility-State Field