Datasheet

Intel
®
Core
TM
i7-660UE, i7-620LE/UE, i7-610E, i5-520E, i3-330E and Intel
®
Celeron
®
Processor P4505, U3405 Series
August 2010 Datasheet Addendum
Document Number: 323178-003 123
Processor Configuration Registers
6.2.41 SLOTCAP - Slot Capabilities
B/D/F/Type: 0/6/0/PCI
Address Offset: B4-B7h
Default Value: 00040000h
Access: RW-O; RO
Size: 32 bits
PCI Express Slot related registers allow for the support of Hot Plug.
3:0 RO 0h Core Current Link Speed (CLS)
This field indicates the negotiated Link speed of the given PCI
Express Link.Defined encodings are:
0001b 2.5 GT/s PCI Express Link
All other encodings are reserved. The value in this field is
undefined when the Link is not up.
Table 63. LSTS - Link Status Register (Sheet 3 of 3)
Bit Access
Default
Value
RST/
PWR
Description
Table 64. SLOTCAP - Slot Capabilities Register (Sheet 1 of 2)
Bit Access
Default
Value
RST/
PWR
Description
31:19 RW-O 0000h Core Physical Slot Number (PSN)
Indicates the physical slot number attached to this Port.
BIOS Requirement: This field must be initialized by BIOS to a
value that assigns a slot number that is globally unique within
the chassis.
18 RW-O 1b Core No Command Completed Support (NCCS)
When set to 1b, this bit indicates that this slot does not
generate software notification when an issued command is
completed by the Hot-Plug Controller. This bit is only permitted
to be set to 1b if the hotplug capable port is able to accept
writes to all fields of the Slot Control register without delay
between successive writes.
17 RO 0b Core Reserved for Electromechanical Interlock Present (EIP)
When set to 1b, this bit indicates that an Electromechanical
Interlock is implemented on the chassis for this slot.
16:15 RW-O 00b Core Slot Power Limit Scale (SPLS)
Specifies the scale used for the Slot Power Limit Value.
00: 1.0x
01: 0.1x
10: 0.01x
11: 0.001x
If this field is written, the link sends a Set_Slot_Power_Limit
message.