Datasheet

Processor Configuration Registers
Intel
®
Core
TM
i7-660UE, i7-620LE/UE, i7-610E, i5-520E, i3-330E and Intel
®
Celeron
®
Processor P4505, U3405 Series
Datasheet Addendum August 2010
90 Document Number: 323178-003
6.2.5 RID6 - Revision Identification
B/D/F/Type: 0/6/0/PCI
Address Offset: 8h
Default Value: 10h
Access: RO
Size: 8 bits
This register contains the revision number of the processor Device 6. These bits are
read only and writes to this register have no effect.
6.2.6 CC6 - Class Code
B/D/F/Type: 0/6/0/PCI
Address Offset: 9-Bh
Default Value: 060400h
Access: RO
Size: 24 bits
This register identifies the basic function of the device, a more specific sub-class, and a
register- specific programming interface.
Table 28. RID6 - Revision Identification Register
Bit Access
Default
Value
RST/
PWR
Description
7:0 RO 10h Core Revision Identification Number (RID6)
This is an 8-bit value that indicates the revision identification
number for the processor Device 0. For the C-0 Stepping, this
value is 10h.
Table 29. CC6 - Class Code Register
Bit Access
Default
Value
RST/
PWR
Description
23:16 RO 06h Core Base Class Code (BCC)
Indicates the base class code for this device. This code has the
value 06h, indicating a Bridge device.
15:8 RO 04h Core Sub-Class Code (SUBCC)
Indicates the sub-class code for this device. The code is 04h
indicating a PCI to PCI Bridge.
7:0 RO 00h Core Programming Interface (PI)
Indicates the programming interface of this device. This value
does not specify a particular register set layout and provides no
practical use for this device.