Intel Celeron D Processor 300 Sequence

Errata
14 Specification Update
Errata
AD1. Memory Aliasing of Pages as Uncacheable Memory Type and Write
Back (WB) May Hang the System
Problem: When a page is being accessed as either Uncacheable (UC) or Write Combining (WC)
and WB, under certain bus and memory timing conditions, the system may loop in a
continual sequence of UC fetch, implicit writeback, and Request For Ownership (RFO)
retries.
Implication: This erratum has not been observed in any commercially available operating system
or application. The aliasing of memory regions, a condition necessary for this
erratum to occur, is documented as being unsupported in the IA-32 Intel
®
Architecture Software Developer's Manual, Volume 3, section 10.12.4, Programming
the PAT. However, if this erratum occurs the system may hang.
Workaround: The pages should not be mapped as either UC or WC and WB at the same time.
Status: For the steppings affected, see the Summary Tables of Changes.
AD2. Data Breakpoints on the High Half of a Floating Point Line Split May
Not Be Captured
Problem: When a floating point load which splits a 64-byte cache line gets a floating point stack
fault, and a data breakpoint register maps to the high line of the floating point load,
internal boundary conditions exist that may prevent the data breakpoint from being
captured.
Implication: When this erratum occurs, a data breakpoint will not be captured.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.
AD3. MOV CR3 Performs Incorrect Reserved Bit Checking When in PAE
Paging
Problem: The MOV CR3 instruction should perform reserved bit checking on the upper
unimplemented address bits. This checking range should match the address width
reported by CPUID instruction 0x8000008. This erratum applies whenever PAE is
enabled.
Implication: Software that sets the upper address bits on a MOV CR3 instruction and expects a
fault may fail. This erratum has not been observed with commercially available
software.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.