Intel Celeron D Processor 300 Sequence
Table Of Contents
- Contents
- Revision History
- 1 Introduction
- 2 Electrical Specifications
- 2.1 FSB and GTLREF
- 2.2 Power and Ground Lands
- 2.3 Decoupling Guidelines
- 2.4 Voltage Identification
- 2.5 Reserved, Unused, and TESTHI Signals
- 2.6 FSB Signal Groups
- 2.7 GTL+ Asynchronous Signals
- 2.8 Test Access Port (TAP) Connection
- 2.9 FSB Frequency Select Signals (BSEL[2:0])
- 2.10 Absolute Maximum and Minimum Ratings
- 2.11 Processor DC Specifications
- 2.12 VCC Overshoot Specification
- 2.13 GTL+ FSB Specifications
- 3 Package Mechanical Specifications
- 4 Land Listing and Signal Descriptions
- 5 Thermal Specifications and Design Considerations
- 6 Features
- 7 Boxed Processor Specifications
- 8 Debug Tools Specifications

12 Datasheet
Introduction
1.1 Terminology
A ‘#’ symbol after a signal name refers to an active low signal, indicating a signal is in the active
state when driven to a low level. For example, when RESET# is low, a reset has been requested.
Conversely, when NMI is high, a nonmaskable interrupt has occurred. In the case of signals where
the name does not imply an active state but describes part of a binary sequence (such as address or
data), the ‘#’ symbol implies that the signal is inverted. For example, D[3:0] = ‘HLHL’ refers to a
hex ‘A’, and D[3:0]# = ‘LHLH’ also refers to a hex ‘A’ (H= High logic level, L= Low logic level).
“FSB” refers to the interface between the processor and system core logic (a.k.a. the chipset
components). The FSB is a multiprocessing interface to processors, memory, and I/O.
1.1.1 Processor Packaging Terminology
Commonly used terms are explained here for clarification:
• Intel
®
Celeron
®
D processor in the 775-land package — Processor in the FC-LGA4
package with a 256 KB L2 cache.
• Processor — For this document, the term “processor” is the generic form of the Celeron D
processor in the 775-land package.
• Keep-out zone — The area on or near the processor that system design can not use.
• Intel
®
915G\915GV\910GL and 915P/915PL Express chipset — Chipsets that support
DDR and DDR2 memory technology for the Celeron D processor in the 775-land package.
• Processor core — Processor core die with integrated L2 cache.
• FC-LGA4 package — The Celeron D processor in the 775-land package is available in a
Flip-Chip Land Grid Array 4 package, consisting of a processor core mounted on a substrate
with an integrated heat spreader (IHS).
• LGA775 socket — The Celeron D processor in the 775-land package mates with the system
board through a surface mount, 775-land, LGA socket.
• Integrated heat spreader (IHS) —A component of the processor package used to enhance
the thermal performance of the package. Component thermal solutions interface with the
processor at the IHS surface.
• Retention mechanism (RM)—Since the LGA775 socket does not include any mechanical
features for heatsink attach, a retention mechanism is required. Component thermal solutions
should attach to the processor via a retention mechanism that is independent of the socket.
• Storage conditions—Refers to a non-operational state. The processor may be installed in a
platform, in a tray, or loose. Processors may be sealed in packaging or exposed to free air.
Under these conditions, processor lands should not be connected to any supply voltages, have
any I/Os biased, or receive any clocks. Upon exposure to “free air” (i.e., unsealed packaging or
a device removed from packaging material) the processor must be handled in accordance with
moisture sensitivity labeling (MSL) as indicated on the packaging material.
• Functional operation—Refers to normal operating conditions in which all processor
specifications, including DC, AC, system bus, signal quality, mechanical and thermal, are
satisfied.