Intel Celeron D Processor 300 Sequence
Table Of Contents
- Contents
- Revision History
- 1 Introduction
- 2 Electrical Specifications
- 2.1 FSB and GTLREF
- 2.2 Power and Ground Lands
- 2.3 Decoupling Guidelines
- 2.4 Voltage Identification
- 2.5 Reserved, Unused, and TESTHI Signals
- 2.6 FSB Signal Groups
- 2.7 GTL+ Asynchronous Signals
- 2.8 Test Access Port (TAP) Connection
- 2.9 FSB Frequency Select Signals (BSEL[2:0])
- 2.10 Absolute Maximum and Minimum Ratings
- 2.11 Processor DC Specifications
- 2.12 VCC Overshoot Specification
- 2.13 GTL+ FSB Specifications
- 3 Package Mechanical Specifications
- 4 Land Listing and Signal Descriptions
- 5 Thermal Specifications and Design Considerations
- 6 Features
- 7 Boxed Processor Specifications
- 8 Debug Tools Specifications

4 Datasheet
5.2.2 Thermal Monitor 2 ..................................................................................75
5.2.3 On-Demand Mode..................................................................................76
5.2.4 PROCHOT# Signal ................................................................................ 77
5.2.5 THERMTRIP# Signal .............................................................................77
5.2.6 T
CONTROL
and Fan Speed Reduction ....................................................77
5.2.7 Thermal Diode........................................................................................78
6 Features...........................................................................................................................79
6.1 Power-On Configuration Options ........................................................................79
6.2 Clock Control and Low Power States.................................................................. 79
6.2.1 Normal State ..........................................................................................80
6.2.2 HALT Powerdown State......................................................................... 80
6.2.3 Stop-Grant States ..................................................................................81
6.2.4 HALT Snoop State, Grant Snoop State ................................................. 81
7 Boxed Processor Specifications....................................................................................... 83
7.1 Mechanical Specifications...................................................................................84
7.1.1 Boxed Processor Cooling Solution Dimensions.....................................84
7.1.2 Boxed Processor Fan Heatsink Weight..................................................86
7.1.3 Boxed Processor Retention Mechanism and Heatsink Attach
Clip Assembly ........................................................................................86
7.2 Electrical Requirements ......................................................................................86
7.2.1 Fan Heatsink Power Supply...................................................................86
7.3 Thermal Specifications........................................................................................ 88
7.3.1 Boxed Processor Cooling Requirements ...............................................88
7.3.2 Variable Speed Fan ...............................................................................90
8 Debug Tools Specifications.............................................................................................. 93
8.1 Logic Analyzer Interface (LAI).............................................................................93
8.1.1 Mechanical Considerations ....................................................................93
8.1.2 Electrical Considerations........................................................................93