Design Guide

System Memory Design Guidelines (DDR-SDRAM) for SO-DIMM configuration

100 Intel

855GM/855GME Chipset Platform Design Guide

Figure 44. Topology 1 Command Signal to Clock Trace Length Matching Diagram

SO-DIMM0

GMCH Package

SMAA[12:6,3,0]

SBA[1:0],

RAS#, CAS#,

WE#

SCK[2:0]

SCK#[2:0]

Note: All lengths are measured from GMCH die

pad to SO-DIMM connector pad.

Clock Reference Length = X0

SO-DIMM0

SO-DIMM1

SCK[5:3]

SCK#[5:3]

Clock Ref Length = X1

CMD Length = Y0

CMD Length = Y1