Design Guide

I/O Subsystem

238 Intel

855GM/855GME Chipset Platform Design Guide

11.11. CPU I/O Signal Considerations

The Intel 82801DBM ICH4-Mhas been designed to be voltage compatible with the CMOS signals of the

Intel Pentium M / Intel Celeron M processor. For Intel Pentium M / Intel Celeron M processor -based

systems, the ICH4-M’s V_CPU_IO rail uses the same 1.05-V voltage as the V

CCP

rails for the processor

the GMCH. It is important to verify that the voltage requirements of all CPU and ICH4-M signals are

compatible with the FWH as well. See Section 11.7 for FWH details. Figure 121 shows a typical

interface between the ICH4-M, CPU, and FWH. See Section 4.1.3.5 for recommended topologies and

routing guidelines.

Figure 121. ICH4-M CPU I/O Signals with Processor and FWH

Processor

FWH

INI

Output Signals

FERR#

V_CPU_IO @ 1.05 V

ICH4-M