Design Guide

Intel 855GM/GME Chipset Based System Power Delivery Guidelines
R
268 Intel
®
855GM/855GME Chipset Platform Design Guide
13.5.2.3. DDR SMRCOMP Resistive Compensation
The GMCH requires a system memory compensation resistor, SMRCOMP, to adjust buffer
characteristics to specific board and operation environment characteristics. Refer to the RS – Intel
®
855GM/GME (Montara-GM/GM+) Chipset GMCH External Design Specification and Figure 140 for
details on resistive compensation. The SMRCOMP signal should be routed with as wide a trace as
possible. It should be a minimum of 12 mils wide and be isolated from other signals with a minimum of
10 mils spacing. A 0.1-uF capacitor should be placed near the 2.5-V supply to the voltage divider, and
not on the SMRCOMP pin.
Figure 140. GMCH SMRCOMP Resistive Compensation
60.4
Ω
+/- 1%
+V2.5
60.4
Ω
+/- 1%
SMRCOMP
0.1
µ
F
The GMCH’s system memory resistive compensation mechanism also requires the generation of
reference voltages to the SMVSWINGL and SMVSWINGH pins. The schematic for SMVSWINGL and
SMVSWINGH voltage generation is illustrated in Figure 141. Two resistive dividers with R1b = R2a =
150 Ω ± 1% and R1a = R2b = 604 Ω ± 1% generate the SMVSWINGL and SMVSWINGH voltages.
SMVSWINGL and SMVSWINGH components should be placed within 0.5 inches of their respective
pins and connected with a 15-mil wide trace. To avoid coupling with any other signals, maintain a
minimum of 25 mils of separation to other signals.
Figure 141. GMCH System Memory Reference Voltage Generation Circuit
R1a
604
Ω
+1%
R2a
150
Ω
+1%
+VCCSM
GMCH
SMVSWINGL
SMVSWING
L
SMVSWINGH
R1b
150
Ω
+1%
R2b
604
Ω
+1%
+VCCSM
SMVSWINGH
0.1
µ
F 0.1
µ
F
13.5.2.4. DDR VTT Termination
The recommended topology for DDR-SDRAM Data, Control, and Command signal groups requires that
all these signals to be terminated to a 1.25V source, VTT, at the end of the memory channel opposite the
GMCH. It is recommended that VTT be generated from the same source as that used for VCCSM, and
not be shared with the GMCH and DDR SMVREF. This is because SMVREF has a much tighter