Manualshelf

Design Guide

ManualsBrandsIntel ManualsOtherIntel Celeron Processor 1.40 GHz, 256K Cache, 100 MHz FSB
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Platform Design Checklist
R
292 Intel
®
855GM/855GME Chipset Platform Design Guide
Pin Name System
Pull-up/Pull-down
Series
Resistor
Notes
9
SMRCOMP
60.4 Ω 1% pull-up to
VccSus2_5
60.4
Ω 1% pull-down to gnd
Signal voltage level = 1/2 * VccSus2_5.
Need 0.1 µF cap by the voltage divider.
This signal may be optionally connected to Vcc2_5 and
powered off in S3.