Design Guide

Platform Design Checklist
R
294 Intel
®
855GM/855GME Chipset Platform Design Guide
16.6.2. FSB
Pin Name System
Pull-up/Pull-down
Notes
9
HXSWING,
HYSWING
301
Ω 1% pull-up to VCCP
150
Ω 1% pull-down to gnd
Signal voltage level = 1/3 of VCCP. C1a=0.1 µF. C1b=0.1 µF. Trace
should be 10-mil wide with 20-mil spacing.
See Figure 153.
HXRCOMP,
HYRCOMP
27.4
Ω 1% pull down to gnd
One pulled-down resistor per pin. Trace should be 10-mil wide with 20-mil
spacing.
HDVREF[2:0]
49.9
Ω 1% pull-up to VCCP
100
Ω 1% pull-down to gnd
Signal voltage level = 2/3 of VCCP. Need one 0.1 µF cap and one 1 µF
cap for voltage divider.
HAVREF
49.9
Ω 1% pull-up to VCCP
100
Ω 1% pull-down to gnd
Signal voltage level = 2/3 of VCCP. Need one 0.1 µF cap and one 1 µF
cap for voltage divider.
HCCVREF
49.9
Ω 1% pull-up to VCCP
100
Ω 1% pull-down to gnd
Signal voltage level = 2/3 of VCCP. Need one 0.1 µF cap and one 1 µF
cap for voltage divider.
Figure 153. GMCH HXSWING & HYSWING Reference Voltage Generation Circuit
301
R1
1%
150
1%
C1a
+VCCP
GMCH
HXSWING
HXSWING HYSWING
301
1%
150
1% C1b
+VCCP
HYSWING]