Design Guide

A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
FLOPPY CONNECTOR
INFRARED PORT
Note: FORCEOFF# overrides FORCEON.
PARALLEL PORT
Caps must be placed
as close as possible to
pins 1,2
R2OUTB is enabled even in suspend.
SER_RIA# is routed to allow the system to
wake up in Suspend To RAM.
SERIAL PORT
4.401
Floppy, Parallel, Serial, and IR Ports
A
35 50Monday, September 15, 2003
Intel 855GM/GME CRB <Doc>
Title
Size Document Number Rev
Date: Sheet
of
Project:
PPT_L_PD1
PPT_L_PD4
PPT_L_PD6
PPT_L_PD2
PPT_L_SLIN#
PPT_L_PD7
PPT_L_BUSY/WAIT#
PPT_L_ACK#
PPT_L_PD5
PPT_L_PD0
PPT_L_PE
PPT_L_SLCT
PPT_L_PNF#
PPT_L_INIT#
PPT_L_ERR#
PPT_L_AFD#/DSTRB#
PPT_L_STB#/WRITE#
PPT_L_PD3
SERBUF_C2-
SERBUF_RIA
SER_RIA
SERBUF_C1-
SERBUF_V+
SERBUF_V-
SERBUF_DTRA
SERBUF_C2+
SERBUF_C1+
SERBUF_SINA#
SERBUF_DCDA
SERBUF_CTSA
SERBUF_RTSA
SERBUF_DSRA
SERBUF_SOUTA#
SERPRT_RIA
SERPRT_DCDA
SERPRT_SINA#
SERPRT_CTSA
SERPRT_DSRA
SERPRT_SOUTA#
SERPRT_DTRA
SERPRT_RTSA
SER_ON
PPT_PD634
PPT_PD034
PPT_PD434
PPT_PD534
PPT_PD334
PPT_PD234
PPT_PD734
PPT_PD134
IR_SEL34
IR_MD134
IR_MD034
FLP_MTR0# 34
FLP_HDSEL# 34
FLP_WGATE# 34
FLP_DR0# 34
FLP_STEP# 34
FLP_DIR# 34
FLP_WDATA# 34
FLP_DENSEL# 34
FLP_DRATE0 34
PPT_SLIN#/ASTRB#34
PPT_STB#/WRITE#34
PPT_AFD#/DSTRB#34
PPT_INIT#34
IR_TXD34
SER_RTSA#34
SER_DTRA#34
SER_SOUTA34
SER_EN19
PM_RI#19,21,37
FLP_TRK0# 34
FLP_RDATA# 34
FLP_DSKCHG# 34
FLP_INDEX# 34
FLP_WP# 34
PPT_SLCT34
PPT_ERR#34
PPT_ACK#34
PPT_PE34
PPT_BUSY/WAIT#34
PPT_PNF#34
IR_RXD34
SER_CTSA#34
SER_SINA34
SER_RIA#34
SER_DSRA#34
SER_DCDA#34
+V3.3S_IR
+V5S8,15..18,20,23..25,27,33,34,38..40,45,46
+V3.3 15,18..20,23,27,30,32,37,38,44,45
+V3.3S5,6,8,9,11,15..18,20,21,23,26,31,33,34,36,38..40,45
+V3.3S
5,6,8,9,11,15..18,20,21,23,26,31,33,34,36,38..40,45
FB1A2D
4 5
U8A1
MAX3243
26
28
24
1
2
27
3
14
13
12
20
18
17
16
15
19
9
10
11
4
5
6
7
8
23
22
21 25
VCC
C1+
C1-
C2+
C2-
V+
V-
T1IN
T2IN
T3IN
R2OUTB
R2OUT
R3OUT
R4OUT
R5OUT
R1OUT
T1OUT
T2OUT
T3OUT
R1IN
R2IN
R3IN
R4IN
R5IN
FORCEON
FORCEOFF#
INVALID# GND
RP3H1B
1K
27
RP3H1C
1K
36
C7A3
0.1UF
C8A4
0.1UF
C8A3
0.1UF
RP3H2A
1K
18
FB2A2B
60OHM@100MHZ
2 7
FB2A1C
60OHM@100MHZ
3 6
J4H1
17x2_HDR
2
4
6
8
1
3
7
9
11
13
15
10
12
14
16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
C7A1
0.1UF
FB1A1D
4 5
U7A1
NO_STUFF_HSDL-3600#017
10
9
8
7
6
5
4
3
2
1 11
LEDA
TXD
RXD
GND
NC
MOD1
MOD0
FIR_SEL
AGND
VDD MNT
R8A1 1K
FB1A2C
63
FB2A2C
60OHM@100MHZ
3 6
J2A1B
CONN,MISC,49P,D-SUB,3-IN-1
26
31
27
32
28
33
29
34
30
50
51
52
53
55
54
FB3A6D
4 5
FB3A6C
60OHM@100MHZ
3 6
FB1A1B
2 7
FB3A6B
2 7
FB3A5D
4 5
FB3A6A
1 8
RP3H2C
1K
36
C7M2
NO_STUFF_10UF
C8M1
0.1UF
FB1A1C
60OHM@100MHZ
3 6
RP3H1A
1K
18
FB3A4D
5 4
R7M1
NO_STUFF_2.2
FB1A2B
2 7
FB2A2D
4 5
FB3A5A
1 8
FB2A1B
2 7
FB1A2A
1 8
FB3A4A
8 1
FB2A1A
1 8
R8M1
1K
Q8H2
BSS138
3
1
2
FB2A1D
4 5
FB3A5C
60OHM@100MHZ
3 6
C7M1
NO_STUFF_0.1UF
FB3A5B
2 7
J2A1A
CONN,MISC,49P,D-SUB,3-IN-1
13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
14
1
FB2A2A
1 8
C8A1
22UF
FB1A1A
60OHM@100MHZ
1 8