Design Guide

A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
IMVP IV
4.401
IMVP-IV & Mux Buffer
A
40 50Monday, September 15, 2003
Intel 855GM/GME CRB <Doc>
Title
Size Document Number Rev
Date: Sheet
of
Project:
VR_VID_D1
VR_VID_N
VR_VID_D4
VR_VID_D2
VR_VID_D3
VR_VID_D5
VR_VID_D0
PM_STPCPU#6,19,37,39
+V5S8,15..18,20,23..25,27,33..35,38,39,45,46
+VCCP3..5,9,18..20,42,46
+V3.3S5,6,8,9,11,15..18,20,21,23,26,31,33..36,38,39,45
SIO_VR_VID5 34
SIO_VR_VID0 34
SIO_VR_VID2 34
SIO_VR_VID4 34
SIO_VR_VID3 34
SIO_VR_VID1 34
ON_BOARD_VR_PWRGD 39
VOUT_EVMC_B39 46
CORE_VR_ON 39
VR_PWRGD_CK408# 6,39
VR_VID139
VR_VID039
VR_VID339
VR_VID239
VR_VID439
VR_VID539
VR_VID[5:0]39
PM_DPRSLPVR19,37,39
ON_BOARD_VR_ON39
PM_PSI#3,39
VR_ON32,37
1.2V_EV
R2G1
1K
+
-
U1F1A
LM339
5
4
2
3
12
R1G4
1K
R1F11
10K
R1G1
1K
R1F14
1K
C2F5
0.1UF
R2F7
10K
+
-
U2F1C
LM339
9
8
14
3
12
R1G3
1K
+
-
U2F1B
LM339
7
6
1
3
12
+
-
U1F1B
LM339
7
6
1
3
12
R1G2
1K
+
-
U2F1D
LM339
11
10
13
3
12
R1F8
10K
+
-
U2F1A
LM339
5
4
2
3
12
C1F3
0.1UF
R2G2
1K
C1F4
0.1UF
R2F8
10K
R1F9
10K
R1F10
10K
R1F13
1K