Design Guide

Intel Pentium M/Celeron M Front Side Bus Design Guidelines
R
Intel
®
855GM/855GME Chipset Platform Design Guide 71
Figure 30. ITP700FLEX Signals Layout Example
1.05v
DBR#
BPM[5:0]#
TDI
TMS
TRST#
Secondary Side
VTT, VTAP
1.05v
1.05v
Primary Side
TCK
TDO
FBO
150
Ω
39.2
Ω
680
Ω
27.4
Ω
0.1uF
220
Ω
22.6
Ω
RESET#
22.6
Ω
54.9
Ω
TDO
1.05v
VCCA=1.8v
Figure 31. ITP_CLK to ITP700FLEX Connector Layout Example
PRIMARY SIDE
LAYER 6
ITP
_
CL
ITP
_
CL
ITP
_
CL
K
CK - 408
Connec
t
33
Ω
49.9
Ω
PRIMARY SIDE
LAYER 6
ITP_CLK
ITP_CLK
ITP_CLK
#
CK
-
408
ITP700FLEX
Connect
o
r
33
Ω
49.9
Ω