Design Guide

System Memory Design Guidelines (DDR-SDRAM) for SO-DIMM configuration
R
Intel
®
855GM/855GME Chipset Platform Design Guide 95
Figure 41. Control Signal to Clock Trace Length Matching Diagram
SO-DIMM0
GMCH Package
SCS#[1:0]
SCKE[1:0]
SCK[2:0]
SCK#[2:0]
Note: All lengths are measured from GMCH
die pad to SO-DIMM connector pads.
CNTRL Length = Y0
Clock Ref. Length = X0
SO-DIMM0 SO-DIMM1
SCK[5:3]
SCK#[5:3]
Clock Ref. Length = X1
Note: All lengths are measured from GMCH
die pad to SO-DIMM connector pads.
SCS#[3:2]
SCKE[3:2]
CNTRL Length = Y1
GMCH Package
GMCH
Die
GMCH
Die