Intel Celeron D Processor 3xx Sequence

70 Datasheet
Features
6.2.2 AutoHALT Powerdown State—State 2
AutoHALT is a low power state entered when the processor executes the HALT instruction. The
processor will transition to the Normal state upon the occurrence of SMI#, BINIT#, INIT#, or
LINT[1:0] (NMI, INTR). RESET# will cause the processor to immediately initialize itself.
The return from a System Management Interrupt (SMI) handler can be to either Normal Mode or
the AutoHALT Power Down state. See the Intel Architecture Software Developer's Manual,
Volume III: System Programmer's Guide for more information.
The system can generate a STPCLK# while the processor is in the AutoHALT Power Down state.
When the system de-asserts the STPCLK# interrupt, the processor will return execution to the
HALT state.
While in AutoHALT Power Down state, the processor will process FSB snoops and interrupts.
Figure 6-1. Stop Clock State Machine
STPCLK#
De-asserted
SLP#
De-asserted
1. Normal State
Normal execution.
3. Stop Grant State
BCLK running.
Snoops and interrupts allowed.
5. Sleep State
BCLK running.
No snoops or interrupts allowed.
2. Auto HALT Power Down State
BCLK running.
Snoops and interrupts allowed.
4. HALT/Grant Snoop State
BCLK running.
Service snoops to caches.
STPCLK#
Asserted
SLP#
Asserted
Snoop
Event
Occurs
Snoop
Event
Serviced
HALT Instruction and
HALT Bus Cycle Generated
INIT#, BINIT#, INTR, NMI,
SMI#, RESET#
Snoop Event Serviced
Snoop Event Occurs
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