Specification Update

Errata
Specification Update 57
Note that even if this combination of instructions is encountered, there is also a
dependency on the internal pipelining and execution state of both instructions in the
processor.
Implication: Inexact-result exceptions are commonly masked or ignored by
applications, as it happens frequently, and produces a rounded result
acceptable to most applications. The PE bit of the FPU status word may
not always be set upon receiving an inexact-result exception. Thus, if
these exceptions are unmasked, a floating-point error exception
handler may not recognize that a precision exception occurred. Note
that this is a “sticky” bit, i.e., once set by an inexact-result condition, it
remains set until cleared by software.
Workaround: This condition can be avoided by inserting two non-floating-point instructions between
the two floating-point instructions.
Status: For the steppings affected, see the Summary Tables of Changes.
W57. MOV to/from Debug Registers Causes Debug Exception
Problem: When in V86 mode, if a MOV instruction is executed to/from a debug
register, a general-protection exception (#GP) should be generated.
However, in the case when the general detect enable flag (GD) bit is
set, the observed behavior is that a debug exception (#DB) is
generated instead.
Implication: With debug-register protection enabled (i.e., the GD bit set), when
attempting to execute a MOV on debug registers in V86 mode, a debug
exception will be generated instead of the expected general-protection
fault.
Workaround: In general, operating systems do not set the GD bit when they are in V86 mode. The
GD bit is generally set and used by debuggers. The debug exception handler should
check that the exception did not occur in V86 mode before continuing. If the exception
did occur in V86 mode, the exception may be directed to the general-protection
exception handler.
Status: For the steppings affected, see the Summary Tables of Changes.
W58. Processor Digital Thermal Sensor (DTS) Readout Stops
Updating upon Returning from C3 State
Problem: Digital Thermal Sensor (DTS) Readout is provided in
IA32_THERM_STATUS bits 22:16. Upon waking up from C3 low-power
state, the DTS readout will no longer be updated.
Implication: Upon waking up from C3 low-power state, software cannot rely on DTS
readout. Any thermal threshold interrupts that are enabled in
IA32_THERM_INTERRUPT, will also be affected.
Workaround: It is possible for BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Tables of Changes.