Specification Update

ManualsBrandsIntel ManualsOtherIntel Celeron Processor 566 MHz, 128K Cache, 66 MHz FSB

Table Of Contents

Errata

Specification Update 97

Implication: If a benign exception occurs while attempting to call the double-fault handler, the

processor may hang or may handle the benign exception. Intel has not observed this

erratum with any commercially available software.

Workaround: None identified.

Status: For the steppings affected, see the Summary Tables of Changes.