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Intel Celeron D Processor 300 Sequence on 90 nm Process

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Errata
52 Specification Update
L69. FXRSTOR May Not Restore Non-canonical Effective Addresses on
Processors with Intel
®
Extended Memory 64 Technology (Intel
®
EM64T) Enabled
Problem: If an x87 data instruction has been executed with a non-canonical effective address,
FXSAVE may store that non-canonical FP Data Pointer (FDP) value into the save
image. An FXRSTOR instruction executed with 64-bit operand size may signal a
General Protection Fault (#GP) if the FDP or FP Instruction Pointer (FIP) is in non-
canonical form.
Implication: When this erratum occurs, Intel EM64T enabled systems may encounter an
unintended #GP fault.
Workaround: Software should avoid using non-canonical effective addressing in EM64T enabled
processors. BIOS can contain a workaround for this erratum removing
the unintended #GP fault on FXRSTOR.
Status: For the steppings affected, see the Summary Tables of Changes.
L70. The Base of an LDT (Local Descriptor Table) Register May be Non-
zero on a Processor Supporting Intel
®
Extended Memory 64
Technology (Intel
®
EM64T)
Problem: In IA-32e mode of an Intel EM64T-enabled processor, the base of an LDT register
may be non-zero.
Implication: Due to this erratum, Intel EM64T-enabled systems may encounter unexpected
behavior when accessing an LDT register using the null selector. There may be no
#GP fault in response to this access.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.
L71. REP STOS/MOVS Instructions with RCX >=2^32 May Cause a System
Hang
Problem: In IA-32e mode using Intel EM64T-enabled processors, executing a repeating string
instruction with the iteration count greater than or equal to 2^32 and a pending
event may cause the REP STOS/MOVS instruction to live lock and hang.
Implication: When this erratum occurs, the processor may live lock and result in a system hang.
Intel has not observed this erratum with any commercially available software.
Workaround: Do not use strings larger than 4 GB.
Status: For the steppings affected, see the Summary Tables of Changes.