Intel Celeron D Processor 300 Sequence on 90 nm Process

Errata
Specification Update 57
conditions required to observe this erratum are a VM entry that returns from SMM
with the “IA-32e guest” VM-entry control set to 1 in the SMM VMCS and the “host
address-space size” VM-exit control cleared to 0 in the executive VMCS.
Implication: A VM Exit will occur when a VMX Abort was expected.
Workaround: An SMM VMM should always set the “IA-32e guest” VM-entry control in the SMM
VMCS to be the value that was in the LMA bit (IA32_EFER.LMA.LMA[bit 10]) in the
IA32_EFER MSR (C0000080H) at the time of the last SMM VM exit. If this guideline is
followed, that value will be 1 only if the “host address-space size” VM-exit control is 1
in the executive VMCS.
Status: For the steppings affected, see the Summary Tables of Changes.
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