Specification Update

MOBILE INTEL
®
CELERON
®
PROCESSOR at 466 MHz, 433 MHz, 400 MHz,
366 MHz, 333 MHz, 300 MHz, 266 MHz SPECIFICATION UPDATE
29
South
Bridge
3
SMBCLK
SMBDATA
SMBALERT#
THRM#
Micro-Controller
SMBALERT#
SMBCLK
SMBDATA
SMBCLK
SMBDATA
Thermal
Sensor
Processor Core
L2 Cache
SMBALERT#
Figure 1. An Example of Microcontroller Driven Thermal Management
Implication:
There is no system impact from this erratum if temperature polling is used for processor thermal
management. If the SMABLERT# interrupt is employed to manage processor thermal sensing, then servicing
the false interrupt may result in premature system action depending on the software and hardware
implementations used. The rate of the false interrupts is less than the auto-convert rate of the thermal sensor.
Workaround: Three different (mutually exclusive) workarounds are possible:
1. Before servicing an interrupt from the thermal sensor, read and compare the processor thermal reading
with the threshold limits (T
HIGH
or T
LOW
). Figures 2 and 3 provide basic flowcharts for the implementation
of this workaround in an interrupt driven system.
2. If the firmware implemented polls the Status Register only, then before taking any action, re-read the
temperature register and do a comparison with the alarm threshold limits (T
HIGH
or T
LOW
) to determine if
the value is actually still within the temperature window.
3. Use a temperature polling scheme to monitor the processor temperature.