Specification Update

Errata
Specification Update 85
W128. An Asynchronous MCE during a Far Transfer May Corrupt
ESP
Problem: If an asynchronous machine check occurs during an interrupt, call through
gate, FAR RET or IRET and in the presence of certain internal conditions,
ESP may be corrupted.
Implication: If the MCE (Machine Check Exception) handler is called without a stack
switch, then a triple fault will occur due to the corrupted stack pointer,
resulting in a processor shutdown. If the MCE is called with a stack
switch, for example when the CPL (Current Privilege Level) was
changed or when going through an interrupt task gate, then the
corrupted ESP will be saved on the stack or in the TSS (Task State
Segment), and will not be used.
Workaround: Use an interrupt task gate for the machine check handler.
Status: For the steppings affected, see the Summary Tables of Changes.
W129. B0-B3 Bits in DR6 May Not Be Properly Cleared after Code
Breakpoint
Problem: B0-B3 bits (breakpoint conditions detect flags, bits [3:0]) in DR6 may not
be properly cleared when the following sequence happens:
1. POP instruction to SS (Stack Segment) selector.
2. Next instruction is FP (Floating Point) that gets FP assist followed by code
breakpoint.
Implication: B0-B3 bits in DR6 may not be properly cleared.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.
W130. REP Store Instructions in a Specific Situation May Cause the
Processor to Hang
Problem: During a series of REP (repeat) store instructions a store may try to
dispatch to memory prior to the actual completion of the instruction.
This behavior depends on the execution order of the instructions, the
timing of a speculative jump and the timing of an uncacheable memory
store. All types of REP store instructions are affected by this erratum.
Implication: When this erratum occurs, the processor may live lock and/or result in
a system hang.
Workaround: It is possible for BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Tables of Changes.