Intel Celeron Processor Specification Update

INTEL
®
CELERON® PROCESSOR SPECIFICATION UPDATE
12
AC = Intel
®
Celeron® Processor in 478 Pin Package
AD = Intel
®
Celeron® D processor on 65 nm process
AE = Intel
®
Core™ Duo Processor and Intel
®
Core™ Solo processor on 65 nm process
AF = Dual-Core Intel
®
Xeon
®
processor LV
AG = Dual-Core Intel
®
Xeon
®
Processor 5100 Series
AH = Intel® Core™2 Duo/Solo Processor for Intel® Centrino® Duo Processor
Technology
AI = Intel
®
Core™2 Extreme Processor X6800
Δ
and Intel
®
Core™2 Duo Desktop Processor E6000
Δ
and
E4000
Δ
Sequence
AJ = Quad-Core Intel
®
Xeon
®
Processor 5300 Series
AK = Intel
®
Core™2 Extreme quad-core processor QX6700
Δ
and Intel
®
Core™2 Quad processor Q6600
Δ
AL = Dual-Core Intel
®
Xeon
®
Processor 7100 Series
AN = Intel
®
Pentium
®
Dual-Core Processor
AO = Quad-Core Intel
®
Xeon
®
processor 3200 series
AP = Dual-Core Intel
®
Xeon
®
Processor 3000 Series
AQ = Intel
®
Pentium
®
Dual-Core Desktop Processor E2000
Δ
Sequence
AR = Intel® Celeron processor 500 series
AS = Intel® Xeon® processor 7200, 7300 series
Summary of Errata
NO. CPUID/Stepping Plans ERRATA
650h
A0
651h
A1
660h
A0
665h
B0
683h
B0
686h
C0
68Ah
D0
6B1h
A1
6B4h
B1
C1 X X X X X X X X X NoFix
FP Data Operand Pointer
may be incorrectly calculated
after FP access which wraps
64-Kbyte boundary in 16-bit
code
C2 X X X X X X X X X NoFix Differences exist in debug
exception reporting
C3 X X X X X X X X X NoFix Code fetch matching
disabled debug register may
cause debug exception
C4 X X X X X X X X X NoFix FP inexact-result exception
flag may not be set
C5 X X X X X X X X X NoFix BTM for SMI will contain
incorrect FROM EIP
C6 X X X X X X X X X NoFix I/O restart in SMM may fail
after simultaneous MCE
C7 X X X X X X X X X NoFix Branch traps do not function
if BTMs are also enabled
C8 X X X X X X X X X NoFix Machine check exception
handler may not always
execute successfully
C9 X X X X X X X X X NoFix LBER may be corrupted after
some events
C10 X X X X X X X X X NoFix BTMs may be corrupted
during simultaneous L1