Intel Celeron Processor Specification Update

INTEL
®
CELERON® PROCESSOR SPECIFICATION UPDATE
87
15.
Page B-41, Table B-19, Formats and Encodings of the SSE2 SIMD Integer Instruction.
Entry PMULL currently states:
PMULL – Packed multiplication
It should state:
PMULLW – Packed multiplication, store low word
The
Intel Architecture Software Developer's Manual, Vol 1: Basic Architecture Section 5.8 "INSTRUCTION
SET SUMMARY” currently states:
RSM Return from system management mode (SSM)
It should state:
RSM Return from system management mode (SMM)
The
Intel Architecture Software Developer's Manual, Vol 2: Instruction Set Reference Section 3.2
"INSTRUCTION REFERENCE" MOVAPS and MOVAPD operation section currently states:
Operation
DEST Å SRC;
It should state:
Operation
DEST Å SRC;
• #GP if SRC or DEST unaligned memory operand *;
C13. RSM Instruction Set Summary
C14. Correct MOVAPS and MOVAPD Operand Section