Uncore Manual

Reference Number: 329468-002 95
Uncore Performance Monitoring
Memory Controller (iMC) Performance Monitoring
WPQ_INSERTS
• Title: Write Pending Queue Allocations
• Category: WPQ Events
• Event Code: 0x20
• Max. Inc/Cyc:. 1, Register Restrictions: 0-3
• Definition: Counts the number of allocations into the Write Pending Queue. This can then be
used to calculate the average queuing latency (in conjunction with the WPQ occupancy count).
The WPQ is used to schedule write out to the memory controller and to track the writes. Requests
allocate into the WPQ soon after they enter the memory controller, and need credits for an entry
in this buffer before being sent from the HA to the iMC. They deallocate after being issued to
DRAM. Write requests themselves are able to complete (from the perspective of the rest of the
system) as soon they have “posted” to the iMC.
WPQ_READ_HIT
• Title: Write Pending Queue CAM Match
• Category: WPQ Events
• Event Code: 0x23
• Max. Inc/Cyc:. 1, Register Restrictions: 0-3
• Definition: Counts the number of times a request hits in the WPQ (write-pending queue). The
iMC allows writes and reads to pass up other writes to different addresses. Before a read or a
write is issued, it will first CAM the WPQ to see if there is a write pending to that address. When
reads hit, they are able to directly pull their data from the WPQ instead of going to memory.
Writes that hit will overwrite the existing data. Partial writes that hit will not need to do underfill
reads and will simply update their relevant sections.
WPQ_WRITE_HIT
• Title: Write Pending Queue CAM Match
• Category: WPQ Events
• Event Code: 0x24
• Max. Inc/Cyc:. 1, Register Restrictions: 0-3
• Definition: Counts the number of times a request hits in the WPQ (write-pending queue). The
iMC allows writes and reads to pass up other writes to different addresses. Before a read or a
write is issued, it will first CAM the WPQ to see if there is a write pending to that address. When
reads hit, they are able to directly pull their data from the WPQ instead of going to memory.
Writes that hit will overwrite the existing data. Partial writes that hit will not need to do underfill
reads and will simply update their relevant sections.
WRONG_MM
• Title: Not getting the requested Major Mode
• Category: MAJOR_MODES Events
• Event Code: 0xc1
• Max. Inc/Cyc:. 1, Register Restrictions: 0-3
• Definition:
WR_CAS_RANK0
• Title: WR_CAS Access to Rank 0
• Category: CAS Events
• Event Code: 0xb8
• Max. Inc/Cyc:. 1, Register Restrictions: 0-3
• Definition: