Uncore Manual

Uncore Performance Monitoring
Intel® QPI Link Layer Performance Monitoring
138 Reference Number: 329468-002
2.8.3.4 Intel® QPI Extra Registers - Companions to PMON HW
The uncore’s Intel
®
QPI box includes an extra MSR that provides the current Intel
®
QPI transfer rate.
Table 2-138. QPI_RATE_STATUS Register – Field Definitions
DRS.DataC_F_FrcAc
kCnflt
0x1C20
&&
Match1
[19:16]
0x1
0x1FE0
&&
Mask1
[19:16]
0xF
Force Acknowledge Data Response message of a cache
line in F state that is response to a core request. The
DRS.DataC_F messages are only sent to Intel® QPI.
DRS.WbIData 0x1C80 0x1FE0 Data Response message for Write Back data where
cacheline is set to the I state.
DRS.WbSData 0x1CA0 0x1FE0 Data Response message for Write Back data where
cacheline is set to the S state.
DRS.WbEData 0x1CC0 0x1FE0 Data Response message for Write Back data where
cacheline is set to the E state.
DRS.AnyResp 0x1C00 0x1E00 Any Data Response message. A DRS message can be
either 9 flits for a full cache line or 11 flits for partial data.
DRS.AnyResp9flits 0x1C00 0x1F00 Any Data Response message that is 11 flits in length. An
11 flit DRS message contains partial data. Each 8 byte
chunk contains an enable field that specifies if the data is
valid.
DRS.AnyResp11flits 0x1D00 0x1F00 Any Non Data Response completion message. A NDR
message is 1 on flit.
NCB.AnyResp 0x1800 0x1E00 Any Non-Coherent Bypass response message.
NCB.AnyMsg9flits 0x1800 0x1F00 Any Non-Coherent Bypass message that is 9 flits in
length. A 9 flit NCB message contains a full 64 byte cache
line.
NCB.AnyMsg11flits 0x1900 0x1F00 Any Non-Coherent Bypass message that is 11 flits in
length. An 11 flit NCB message contains either partial data
or an interrupt. For NCB 11 flit data messages, each 8
byte chunk contains an enable field that specifies if the
data is valid.
NCB.AnyInt 0x1900 0x1F80 Any Non-Coherent Bypass interrupt message. NCB
interrupt messages are 11 flits in length.
Field Bits Attr
HW
Reset
Val
Description
rsv 31:5 RV 0 Reserved. SW must write to 0 else behavior is undefined.
slow_mode 4 RO-V 0 Slow Mode
Reflects the current slow mode status being driven to the
PLL This will be set out of reset to bring Intel
®
QPI in slow
mode. And is only expected to be set when QPI_rate is set
to 6.4 GT/s
rsv 3 RV 0 Reserved. SW must write to 0 else behavior is undefined.
Table 2-137. Message Events Derived from the Match/Mask filters
Field
Match
[12:0]
Mask
[12:0]
Description