Uncore Manual

Uncore Performance Monitoring
R3QPI Performance Monitoring
174 Reference Number: 329468-002
Once a freeze has occurred, in order to see a new freeze, the overflow field responsible for the freeze,
must be cleared by setting the corresponding bit in R3_Ly_PCI_PMON_BOX_STATUS.ov and
U_MSR_PMON_GLOBAL_STATU.ov_rq. Assuming all the counters have been locally enabled (.en bit in
data registers meant to monitor events) and the overflow bit(s) has been cleared, the R3QPI Link is
prepared for a new sample interval. Once the global controls have been re-enabled (Section 2.1.4,
“Enabling a New Sample Interval from Frozen Counters”), counting will resume.
2.10.3 R3QPI Performance Monitors
Table 2-189. R3QPI Performance Monitoring Registers
2.10.3.1 R3QPI Box Level PMON State
The following registers represent the state governing all box-level PMUs for each Link of the R3QPI Box.
In the case of the R3QPI Links, the R3_Ly_PCI_PMON_BOX_CTL register provides the ability to manu-
ally freeze the counters in the box (.frz) and reset the generic state (.rst_ctrs and .rst_ctrl).
If an overflow is detected from one of the R3QPI PMON registers, the corresponding bit in the
R3_Ly_PCI_PMON_BOX_STATUS.ov field will be set. To reset these overflow bits, a user must write a
value of ‘1’ to them (which will clear the bits).
Register Name
PCICFG
Address
Size
(bits)
Description
PCICFG Base Address Dev:Func
R3QPI0 Link 0 PMON Registers D19:F5
R3QPI0 Link 1 PMON Registers D19:F6
R3QPI1 Link 2 PMON Registers D18:F5
Box-Level Control/Status
R3_Ly_PCI_PMON_BOX_STATUS F8 32 R3QPI Link y PMON Box-Wide Status
R3_Ly_PCI_PMON_BOX_CTL F4 32 R3QPI Link y PMON Box-Wide Control
Generic Counter Control
R3_Ly_PCI_PMON_CTL2 E0 32 R3QPI Link y PMON Control for Counter 2
R3_Ly_PCI_PMON_CTL1 DC 32 R3QPI Link y PMON Control for Counter 1
R3_Ly_PCI_PMON_CTL0 D8 32 R3QPI Link y PMON Control for Counter 0
Generic Counters
R3_Ly_PCI_PMON_CTR2 B4+B0 32x2 R3QPI Link y PMON Counter 2
R3_Ly_PCI_PMON_CTR1 AC+A8 32x2 R3QPI Link y PMON Counter 1
R3_Ly_PCI_PMON_CTR0 A4+A0 32x2 R3QPI Link y PMON Counter 0