Datasheet

Processor Uncore Configuration Registers
152 Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
13.2.5.8 CORRERRTHRSHLD_1
This register holds the per rank corrected error thresholding value.
13.2.5.9 CORRERRTHRSHLD_2
This register holds the per rank corrected error thresholding value.
14:0 RW 0x7fff
RANK 0 COR_ERR_TH (cor_err_th_0):
The corrected error threshold for this rank that will be compared to the per
rank corrected error counter.
Type: CFG PortID: N/A
Bus: 1 Device: 16 Function: 2,3,6,7
Bus: 1 Device: 30 Function: 2,3,6,7
Offset: 0x11c
Bit Attr Default Description
Type: CFG PortID: N/A
Bus: 1 Device: 16 Function: 2,3,6,7
Bus: 1 Device: 30 Function: 2,3,6,7
Offset: 0x120
Bit Attr Default Description
31:31 RV - Reserved.
30:16 RW 0x7fff
RANK 3 COR_ERR_TH (cor_err_th_3):
The corrected error threshold for this rank that will be compared to the per rank
corrected error counter.
15:15 RV - Reserved.
14:0 RW 0x7fff
RANK 2 COR_ERR_TH (cor_err_th_2):
The corrected error threshold for this rank that will be compared to the per rank
corrected error counter.
Type: CFG PortID: N/A
Bus: 1 Device: 16Function:2,3,6,7
Bus: 1 Device: 30Function:2,3,6,7
Offset: 0x124
Bit Attr Default Description
31:31 RV - Reserved.
30:16 RW 0x7fff
RANK 5 COR_ERR_TH (cor_err_th_5):
The corrected error threshold for this rank that will be compared to the per
rank corrected error counter.
15:15 RV - Reserved.
14:0 RW 0x7fff
RANK 4 COR_ERR_TH (cor_err_th_4):
The corrected error threshold for this rank that will be compared to the per
rank corrected error counter.