Datasheet

Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family 153
Datasheet Volume Two: Functional Description, February 2014
Processor Uncore Configuration Registers
13.2.5.10 CORRERRTHRSHLD_3
This register holds the per rank corrected error thresholding value.
13.2.5.11 CORRERRORSTATUS
Per rank corrected error status. These bits are reset by bios.
Type: CFG PortID: N/A
Bus: 1 Device: 16 Function: 2,3,6,7
Bus: 1 Device: 30 Function: 2,3,6,7
Offset: 0x128
Bit Attr Default Description
31:31 RV - Reserved.
30:16 RW 0x7fff
RANK 7 COR_ERR_TH (cor_err_th_7):
The corrected error threshold for this rank that will be compared to the per rank
corrected error counter.
15:15 RV - Reserved.
14:0 RW 0x7fff
RANK 6 COR_ERR_TH (cor_err_th_6):
The corrected error threshold for this rank that will be compared to the per rank
corrected error counter.
Type: CFG PortID: N/A
Bus: 1 Device: 16 Function: 2,3,6,7
Bus: 1 Device: 30 Function: 2,3,6,7
Offset: 0x134
Bit Attr Default Description
31:8 RV - Reserved.
7:0 RW1C 0x0
ERR_OVERFLOW_STAT (err_overflow_stat):
This 8 bit field is the per rank error over-threshold status bits. The organization
is as follows:
Bit 0 : Rank 0
Bit 1 : Rank 1
Bit 2 : Rank 2
Bit 3 : Rank 3
Bit 4 : Rank 4
Bit 5 : Rank 5
Bit 6 : Rank 6
Bit 7 : Rank 7
Note: The register tracks which rank has reached or exceeded the
corresponding CORRERRTHRSHLD threshold settings.