Datasheet

Processor Uncore Configuration Registers
160 Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
13.5.2.3 FWDC_LCPKAMP_CFG
13.6 Processor Utility Box (UBOX) Registers
The UBOX is the piece of processor logic that deals with the non mainstream flows in
the system. This includes transactions like the register accesses, interrupt flows, lock
flows, and events. In addition, the UBOX houses coordination for the performance
architecture, and also houses scratchpad and semaphore registers.
Type: CFG PortID: N/A
Bus: 1 Device: 8 Function: 4
Bus: 1 Device: 9 Function: 4
Bus: 1 Device: 24 Function: 4
Offset: 0x100
Bit Attr Default Description
31:20 RO 0x0
next_capability_offset:
Indicates there are no capability structures in the enhanced configuration
space.
19:16 RO 0x1
capability_version:
Capability Version.
15:0 RO 0xb
capability_id:
Capability ID.
Type: CFG PortID: N/A
Bus: 1 Device: 8Function:4
Bus: 1 Device: 9Function:4
Bus: 1 Device: 24Function:4
Offset: 0x390
Bit Attr Default Description
31:30 RV - reserved.
29:25 RWS_L 0xe fwdc_lcampcapctl_8g:
24:20 RWS_L 0x1b fwdc_lcampcapctl_6g:
19:17 RV - reserved.
16:16 RWS_L 0x0
fwdc_fca_lcamp_byp_en:
Enable signal for LC peak amplifier. when this path is enabled, the other
parallel forwarded clock path is disabled
0 = LC peak amplifier is enabled, normal mode
1 = LC peak amplifier bypassed
affects AFE pin: csfwdc_fca_lcamp_byp_en_u<0-1>_f0csnnnh
15:13 RV - reserved.
12:8 RWS_L 0x14 fwdc_lcampcapctl:
7:0 RV - reserved.