Datasheet

Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family 181
Datasheet Volume Two: Functional Description, February 2014
Processor Uncore Configuration Registers
12:12 RO_FW 0x0
HT_DIS:
Disable Multi threading
11:9 RO_FW 0x0
LLC_WAY_EN:
Enable LLC ways
value Cache size
'000: 0.5 M (4 lower ways)
'001: 1 M (8 lower ways)
'010: 1.5 M (12 lower ways)
'011: 2 M (16 lower ways)
'100: 2.5M (20 lower ways)
8:8 RO_FW 0x0
PRG_TDP_LIM_EN:
Allows usage of TURBO_POWER_LIMIT MSRs
7:5 RO_FW 0x0
CACHESZ:
Minimal LLC size / ways.
Can be upgraded through SSKU up to LLC_WAYS_EN.
Value LLC Size per slice (Enabled ways per slice)
'000: 0.5 M (4 lower ways)
'001: 1 M (8 lower ways)
'010: 1.5 M (12 lower ways)
'011: 2 M (16 lower ways)
'100: 2.5M (20 lower ways)
4:4 RO_FW 0x0
DE_SKTR1_EX:
Socket R1, EX
3:3 RO_FW 0x0
DE_SKTR_EP4S:
SKU configuration indication to BIOS. Definition depends upon DE_SKTR1_EX
bit
Intel Xeon processor E7 v2 Series-based platform: When 0, indicates UP/2S,
depending up CAPID0[2]; When 1, indicates 4S/8S, depending upon CAPID0[2]
2:2 RO_FW 0x0
DE_SKTR_EP2S:
SKU configuration indication to BIOS. Definition depends upon DE_SKTR1_EX
bit
Intel® Xeon® Processor E7-2800/4800/8800 v2 product family-based
platform: When 0, indicates UP or 4S, depending upon CAPID0[3]; When 1,
indicates 2S or 8S, depending upon CAPID0[3]
1:1 RO_FW 0x0
DE_SKTB2_EN:
SKU configuration indication to BIOS. Definition depends upon DE_SKTR1_EX
bit
Intel Xeon processor E7 v2 Series-based platform: Unused
0:0 RO_FW 0x0
DE_SKTB2_UP:
SKU configuration indication to BIOS. Definition depends upon DE_SKTR1_EX
bit
Intel Xeon processor E7 v2 Series-based platform: Indicates that this SKU is
scalable, support determined by CAPID[3:2] settings
Type: CFG PortID: N/A
Bus: 1 Device: 10 Function: 3
Offset: 0x84
Bit Attr Default Description