Datasheet

Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family 183
Datasheet Volume Two: Functional Description, February 2014
Processor Uncore Configuration Registers
13.7.4.4 CAPID2
This register is a Capability Register used to expose enable/disable for BIOS use.
7:7 RO_FW 0x0
X2APIC_EN:
Enable Extended APIC support.
When set the enables the support of x2APIC (Extended APIC) in the core and
uncore. The being set will impact:
a. CPUID indication x2APIC support
b. CPU ability to enable x2APIC support
c. Uncore ability to generate and send x2APIC messages.
6:6 RO_FW 0x0
CPU_HOT_ADD_EN:
Intel
®
TXT - ENABLE CPU HOT ADD
5:5 RO_FW 0x0
PWRBITS_DIS:
0b Power features activated during reset
1b Power features (especially clock gating) are not activated
4:4 RO_FW 0x0
GV3_DIS:
Disable GV3. Does not allow for the writing of the IA32_PERF_CONTROL
register in order to change ratios
3:2 RO_FW 0x0
PPPE:
PPPE_ENABLE
1:1 RO_FW 0x0
CORE_RAS_EN:
Enable Data Poisoning, MCA recovery
0:0 RO_FW 0x0
DCA_EN:
DCA Enable
Type: CFG PortID: N/A
Bus: 1 Device: 10 Function: 3
Offset: 0x88
Bit Attr Default Description
Type: CFG PortID: N/A
Bus: 1 Device: 10 Function: 3
Offset: 0x8c
Bit Attr Default Description
31:31 RO_FW 0x0 QPI_SPARE:
30:30 RO_FW 0x0
QPI_LINK2_DIS:
When set Intel
®
QPI link 2 will be disabled.
29:25 RO_FW 0x0
QPI_ALLOWED_CFCLK_RATIO_DIS:
Allowed CFCLK ratio is 12,11,10,9, 8 (default),7; One bit is allocated for each
supported ratio except 8, the default ratio. Intel
®
QPI transfer rate = 8 *
CFCLK. Bits are organized as r12_r11_r10_r9_r7 format. 0/1 --> ratio
supported/not supported. Default ratio of 8 is always supported, hence can not
be disabled. Ex: 00000 ==> Supported ratio: 12,11,10,9,8 (default),7; ratio
not supported:
none 00001 ==> Supported ratio: 12,11,10,9,8 (default); ratio not supported:
7
........ 11111 ==> Supported ratio: 8 (default); ratio not supported:
12,11,10,9,7