Datasheet

Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family 201
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
14.2.8 PLAT
14.2.9 HDR
14.2.10 BIST
Type: CFG PortID: N/A
Bus: 0 Device: 0Function:0
Bus: 0 Device: 2Function:0-3
Bus: 0 Device: 3Function:0-3
Offset: 0xd
Bit Attr Default Description
7:0 RO 0x0
primary_latency_timer:
Not applicable to PCI Express*. Hardwired to 00h.
Type: CFG PortID: N/A
Bus: 0 Device: 0Function:0
Bus: 0 Device: 2Function:0-3
Bus: 0 Device: 3Function:0-3
Offset: 0xe
Bit Attr Default Description
7:7
RO_V
RO (Device 0
Function 0)
0x1
0x0 (Device 0
Function 0)
mfd:
Multifunction Device
This bit defaults to 0 for Device 0.
This bit defaults to 1 for Devices 2-3.
BIOS can individually control the value of this bit in Function 0 of
these devices, based on HDRTYPCTRL register. BIOS will write to
that register to change this field to 0 in Function 0 of these
devices, if it exposes only Function 0 in the device to OS.
Note: In product SKUs where only Function 0 of the device is
exposed to any software (BIOS/OS), BIOS would have to still set
the control bits mentioned above to set the this bit in this
register to be compliant per PCI rules.
6:0
RO
RO_V (Device 0
Function 0)
0x1
0x0 (Device 0
Function 0)
cl:
Configuration Layout
This field identifies the format of the configuration header layout.
In DMI mode, default is 00h indicating a conventional type 00h
PCI header.
In PCIe* mode, the default is 01h, corresponding to Type 1 for a
PCIe* root port.
Type: CFG PortID: N/A
Bus: 0 Device: 0Function:0
Bus: 0 Device: 2Function:0-3
Bus: 0 Device: 3Function:0-3
Offset: 0xf
Bit Attr Default Description
7:0 RO 0x0
bist_tests:
Not Supported. Hardwire to 00h.