Datasheet

Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family 21
Datasheet Volume Two: Functional Description, February 2014
Overview
1.3 Related Documents
Refer to the following documents for additional information.
Uncore The portion of the processor comprising the shared cache, iMC, HA, PCU, UBox,
and Intel QPI link interface.
Unit Interval Signaling convention that is binary and unidirectional. In this binary signaling,
one bit is sent for every edge of the forwarded clock, whether it be a rising edge
or a falling edge. If a number of edges are collected at instances t
1
, t
2
, t
n
,...., t
k
then the UI at instance “n” is defined as:
UI
n
= t
n
- t
n-1
V
CC
Processor core power supply
V
SS
Processor ground
x1 Refers to a Link or Port with one Physical Lane
x4 Refers to a Link or Port with four Physical Lanes
x8 Refers to a Link or Port with eight Physical Lanes
x16 Refers to a Link or Port with sixteen Physical Lanes
XNC eXtended Node Controller. OEM proprietary silicon that is used to interface with
processor to build up scalable systems.
Table 1-1. Processor Terminology (Sheet 4 of 4)
Term Description
Table 1-2. Processor Documents
Document Document Number
Intel® Xeon® Processor E7-2800/4800/8800 v2 Product Family Datasheet -
Volume One
329594-001
Intel® Xeon® Processor E7-2800/4800/8800 v2 Processor Thermal/Mechanical
Design Guide
329596-001
Intel® Xeon® Processor E7-2800/4800/8800 v2 Product Family
Specification Update
329597-001
Intel® Xeon® Processor E7-2800/4800/8800 v2 Product Family BSDL
(Boundary Scan Description Language)
329598-001
Table 1-3. Public Specifications (Sheet 1 of 2)
Document Document Number/ Location
Advanced Configuration and Power Interface Specification 3.0 http://www.acpi.info
PCI Local Bus Specification 3.0 http://www.pcisig.com/specifications
PCI Express
®
Base Specification - Revision 1.1
PCI Express
®
Base Specification - Revision 2.1
PCI Express
®
Base Specification - Revision 3.0 Draft
http://www.pcisig.com
DDR3 SDRAM Specification and Register Specification http://www.jedec.org
Intel
®
64 and IA-32 Architectures Software Developer's Manuals
• Volume 1: Basic Architecture
• Volume 2A: Instruction Set Reference, A-M
• Volume 2B: Instruction Set Reference, N-Z
• Volume 3A: System Programming Guide
• Volume 3B: System Programming Guide
Intel® 64 and IA-32 Architectures Optimization Reference Manual
http://www.intel.com/products/processor/
manuals/index.htm
Intel® Virtualization Technology Specification for Directed I/O
Architecture Specification
http://download.intel.com/technology/com
puting/vptech/Intel(r)_VT_for_Direct_IO.p
df