Datasheet

Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family 213
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
14.2.32 MSICAPID
MSI Capability ID.
14.2.33 MSINXTPTR
MSI Next Pointer.
14.2.34 MSIMSGCTL
MSI Control.
Type: CFG PortID: N/A
Bus: 0 Device: 0Function:0 (PCIe* Mode)
Bus: 0 Device: 2Function:0-3
Bus: 0 Device: 3Function:0-3
Offset: 0x60
Bit Attr Default Description
7:0 RO 0x5
capability_id:
Assigned by PCI-SIG for MSI root ports.
Type: CFG PortID: N/A
Bus: 0 Device: 0Function:0 (PCIe* Mode)
Bus: 0 Device: 2Function:0-3
Bus: 0 Device: 3Function:0-3
Offset: 0x61
Bit Attr Default Description
7:0 RW_O 0x90
next_ptr:
This field is set to 90h for the next capability list (PCI Express capability
structure) in the chain.
Type: CFG PortID: N/A
Bus: 0 Device: 0Function:0 (PCIe* Mode)
Bus: 0 Device: 2Function:0-3
Bus: 0 Device: 3Function:0-3
Offset: 0x62
Bit Attr Default Description
15:9 RV - Reserved.
8:8 RO 0x1
pvmc:
This bit indicates that PCI Express ports support MSI per-vector masking.
7:7 RO 0x0
b64ac:
This field is hardwired to 0h since the message addresses are only 32-bit
addresses (e.g. FEEx_xxxxh).