Datasheet

Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family 243
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
14.2.58 LNKSTS2
PCI Express Link Status Register 2.
Type: CFG PortID: N/A
Bus: 0 Device: 0Function:0 (DMI2 Mode)
Offset: 0x1c2
Bus: 0 Device: 0Function:0 (PCIe* Mode)
Bus: 0 Device: 2Function:0-3
Bus: 0 Device: 3Function:0-3
Offset: 0xc2
Bit Attr Default Description
15:6 RV - Reserved.
5:5 RW1CS 0x0
lnkeqreq:
This bit is Set by hardware to request Link equalization process to be
performed on the link.
Reserved for Device 0 Function 0.
4:4 RO_V 0x0
eqph3_succ:
When set to 1b, this indicates that Phase 3 of the Transmitter Equalization
procedure has successfully completed.
Reserved for Device 0 Function 0.
3:3 RO_V 0x0
eqph2_succ:
When set to 1b, this indicates that Phase 2 of the Transmitter Equalization
procedure has successfully completed.
Reserved for Device 0 Function 0.
2:2 RO_V 0x0
eqph1_succ:
When set to 1b, this indicates that Phase 1 of the Transmitter Equalization
procedure has successfully completed.
Reserved for Device 0 Function 0.
1:1 RO_V 0x0
eqcmp:
When set to 1b, this indicates that the Transmitter Equalization procedure
has completed.
Reserved for Device 0 Function 0.
0:0 RO_V 0x0
current_de_emphasis_level:
When operating at Gen2 speed, this reports the current deemphasis level.
This field is Unused for Gen1 speeds
1b: -3.5 dB
0b: -6 dB