Datasheet

Integrated I/O (IIO) Configuration Registers
252 Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.2.71 ERRCAPHDR
PCI Express Enhanced Capability Header - Root Ports.
14.2.72 UNCERRSTS
Uncorrectable Error Status.
This register identifies uncorrectable errors detected for PCI Express/DMI port.
Type: CFG PortID: N/A
Bus: 0 Device: 0Function:0 (PCIe* Mode)
Bus: 0 Device: 2Function:0-3
Bus: 0 Device: 3Function:0-3
Offset: 0x148
Bit Attr Default Description
31:20 RO 0x1d0
next_capability_offset:
This field points to the next Capability in extended configuration space or is 0
if it is that last capability.
19:16 RO 0x1
capability_version:
Set to 1h for this version of the PCI Express logic
15:0 RO 0x1
pci_express_extended_cap_id:
Assigned for advanced error reporting
Type: CFG PortID: N/A
Bus: 0 Device: 0Function:0
Bus: 0 Device: 2Function:0-3
Bus: 0 Device: 3Function:0-3
Offset: 0x14c
Bit Attr Default Description
31:22 RV - Reserved.
21:21 RW1CS 0x0 acs_violation_status:
20:20 RW1CS 0x0 received_an_unsupported_request:
19:19 RV - Reserved.
18:18 RW1CS 0x0 malformed_tlp_status:
17:17 RW1CS 0x0 receiver_buffer_overflow_status:
16:16 RW1CS 0x0 unexpected_completion_status:
15:15 RW1CS 0x0 completer_abort_status:
14:14 RW1CS 0x0 completion_time_out_status:
13:13 RW1CS 0x0 flow_control_protocol_error_status:
12:12 RW1CS 0x0 poisoned_tlp_status:
11:6 RV - Reserved.
5:5 RW1CS 0x0 surprise_down_error_status:
4:4 RW1CS 0x0 data_link_protocol_error_status:
3:0 RV - Reserved.